1. Field of the Invention
The present invention relates to a method of fabricating integrated thin film solar cells. More particularly, it relates to a method of fabricating integrated thin film solar cells preventing the quality degradation of photoelectric conversion and the loss in the effective power generation area.
2. Description of the Prior Art
Integrated thin film solar cells typically each include an amorphous semiconductor photoelectric conversion layer formed on a transparent substrate having an insulative surface, and provide for ready power generation at a predetermined voltage. A conventional process for fabricating integrated thin film solar cells is disclosed, for example, in Japanese Unexamined Patent Publication No. Sho 63(1988)-3470, in which a thin film formation step and a scribing step are repeatedly performed. This conventional fabrication method will be described with reference to FIG. 4(a) to FIG. 4(c).
As shown in FIG. 4(a), a transparent conductive film is deposited on a transparent substrate 1 such as a glass substrate having an insulative surface by evaporation, CVD (chemical vapor deposition) or sputtering method. The transparent conductive film is segmented into a plurality of elongate transparent conductive film electrodes 3 for isolation of unit cells through a laser scribing method by irradiating the transparent conductive film with a laser beam 11. This step is called a first scribing step, and trenches formed through the first scribing step are called first scribe lines. Thus, the plurality of elongate transparent conductive film electrodes 3 are formed on the surface of the substrate 1.
As shown in FIG. 4(b), an amorphous semiconductor layer is deposited on the surface of the resulting substrate 1 by CVD. Trenches are formed in the amorphous semiconductor layer along lines extending parallel to and adjacent to the first scribe lines through the laser scribing method by irradiating the amorphous semiconductor layer with a laser beam 12 keeping the underlying transparent conductive film electrodes 3 intact. This step is called a second scribing step, and the trenches formed through the second scribing step are called second scribe lines. Thus, the amorphous semiconductor layer is segmented into a plurality of amorphous semiconductor photoelectric conversion layers 4 for the respective cells as shown in FIG. 4(b).
As shown in FIG. 4(c), a rear electrode layer is deposited on the resulting substrate (i.e., on the amorphous semiconductor photoelectric conversion layer 4 and in the second scribed lines). Then, trenches are formed in the rear electrode layer along lines respectively extending parallel to and adjacent to the second scribe lines on sides thereof opposite to the first scribe lines through the laser scribing method. This step is called a third scribing step, and the trenches formed through the third scribing step are called third scribe lines. In the third scribing step, the rear electrode layer is segmented into a plurality of elongate rear electrodes 10 for the respective unit cells which, in turn, are connected in series.
In the third scribing step, the laser scribing method enables the third scribe lines to be each spaced a reduced distance from an adjacent second scribe line, making it possible to reduce a loss in the effective power generation area of the overall integrated cell module.
In the laser scribing method, however, a surface portion of the amorphous semiconductor photoelectric conversion layer 4 is liable to be crystallized by the irradiation with the laser beam thereby to have a reduced specific resistance when the trenches are formed selectively in the rear electrode layer. This may result in a current leakage. Alternatively, the trenches may be formed simultaneously in the rear electrode layer and in the amorphous semiconductor layer by the laser scribing method. However, scribe dust of the rear electrode layer may cause a short circuit between the rear electrode 10 and the transparent conductive film electrode 3, thereby causing a current leakage. In either of the cases, the shunt resistance is reduced, resulting in a reduced yield.
In the third scribing step, the isolation of the unit cells may be achieved simultaneously with the formation of the rear electrode 10 by evaporation or sputtering with the use of a metal mask.
Where the sputtering method or the like is employed, however, edge portions of the metal mask used for the formation of the rear electrode 10 damage the amorphous semiconductor photoelectric conversion layers 4, thereby causing current leakage and reducing the conversion efficiency. Further, to prevent a patterning failure due to vapor diffusion during the evaporation, an isolation region having a greater width should be provided between each adjacent pair of rear electrodes 10, resulting in a greater loss in the effective power generation area.
In the third scribing step, the segmentation of the rear electrode layer 10a may otherwise be achieved by first applying a resist over the substrate by a printing method to form a resist film 7, then patterning the resist film 7 as shown in FIG. 5(a), and etching off portions of the rear electrode layer 10a with a liquid etchant to form a rear electrode 10 as shown in FIG. 5(b).
This method ensures reliable segmentation of the rear electrode layer 10a, but suffers the limitation of the printing accuracy so that the loss in the effective power generation area of the integrated cell module is increased.